The new single main board.

The V3 Z80 board replaces three individual PCBs used previously:

a) The Z80 CPU with ROM + RAM
b) Keyboard + IDE interfaces
c) soundcard and joystick interfaces

The functionality remains largely the same, but some optimizations have been made, CPLDs used to replace discrete logic chips and surface mounted components used here and there to save space. Pin headers have been used so that flat cables with IDC sockets can lead out to the final connectors.

One of the optimizations concerned the Z80 memory mapping which was changed to best utilize a single RAM chip (an SMT 128KB, 70ns async SRAM) for all the RAM requirements. In the Z80 address space, $8000-$FFFF is paged so that three sections of memory can appear in those locations (banks beginning at $8000, $10000 and $18000 in the actual SRAM), with the banks being selected by a couple of bits in a port register of CPLD #1. Z80 address space $800-$7FFF is fixed to $800-$7FFF in the SRAM and $0-$7FF selects the boot ROM IC (a more flexible system would've allowed the boot ROM to be switched out totally but it as it contains the font also used by the OS, it didnt waste much space).

There are two CPLDs taking the place of a lot of the discrete logic, their functions are:

CPLD #1 - XC9572 (15ns): Decodes address lines to provide chip select signals for the RAM and ROM. Holds port output and control registers and demultiplexes address lines to select them during OUT instructions, allows data from input ports onto the Z80 databus during port read (IN) instructions, masks and ORs together incoming interrupt lines from video, keyboard and the sound, acts as interface to SX28 sound system (latches data written by Z80 until the SX28 is ready to accept it).

CPLD #2 - XC9536 (15ns): IDE interface: presents a 16 bit word to the IDE databus following two 8-bit port writes and presents the 16bit word to the Z80 in two byte chunks during two port reads. Uses an external bidrectional 8-bit buffer IC (74LS245) to sit between the low 8 bits of the IDE databus and the Z80 databus - provides select and data direction signals for this IC.

The two microcontrollers on the board have the following functions:

Microcontroller #1 - PIC16F627: Keyboard interface (Uses internal RC clock gen @ ~4MHz) Talks to a standard PS/2 PC keyboard in serial format and presents the keycode data as bytes to a 8 bit buffer IC. (A line from CPLD #1 allows its data onto the Z80 bus during the approriate port read.) Also produces a system wide reset pulse and NMI for the Z80 in response to a sequence of keypresses. Described in detail elsewhere.

Microcontroller #2 - SX28 @ 64MHz. 4 channel sound system. Accepts data from CPU via CPLD #1 and produces tones and simple waveforms. Channels are mixed digitally and output fed into an R2R resistor DAC. Described in detail elsewhere.